lowRISC Collaborates with Industry Leaders to Create OpenTitan

lowRISC C.I.C., the open source silicon and tools collaborative engineering company, today announced that it has partnered with ETH Zürich, Google, G+D Mobile Security, Nuvoton Technology and Western Digital in support of OpenTitan, an open source hardware root of trust (RoT) reference design and integration guidelines that enable chip producers and platform providers to build transparently implemented, high-quality hardware RoT chips tailored for data center servers and other devices.

Security begins with infrastructure, and OpenTitan will help ensure root of trust in hardware, transparently implemented, at the foundation for a multitude of devices such as server motherboards, network cards, routers and IoT. Adopters of this framework can inspect and contribute to OpenTitan’s register-transfer level (RTL) design, firmware, and documentation, helping to build more transparent, trustworthy hardware RoT chips for everyone.

OpenTitan is stewarded by lowRISC, which provides a neutral home for collaborative engineering to develop and maintain open source silicon designs and tools for the long term. As with open source software, open silicon provides a deep level of transparency and therefore auditability, as well as enabling innovation. Shared open infrastructure technology permits focus on product differentiation, with shared costs and substantially reduced overall risk.

The Ibex RISC-V processor core, which was originally developed by ETH Zürich as zero-riscy and contributed to lowRISC earlier this year, forms a key component for OpenTitan. lowRISC is committed to raising the bar for quality in open silicon via a methodical approach that combines the development and use of best practices and coding standards, with rigorous testing and verification.

Key benefits of OpenTitan for chip manufacturers and platform providers include:

1. Transparent: Adopters can inspect and contribute to OpenTitan’s design, firmware, and documentation, helping to build more transparent, trustworthy hardware RoT chips that benefit everyone.
2. High-quality: OpenTitan’s goal is to build and maintain a high-quality and logically secure RTL design, firmware, and documentation. The project is staffed by expert engineers focused on rigorous design validation and technical documentation, all based on key learnings from designing Google’s Titan chips.
3. Flexible: Adopters can increase their total addressable market and reduce costs by using a single platform-agnostic hardware RoT design that can be integrated in data center servers, peripherals, and any other hardware platforms.

“We believe collaboratively developed open source silicon designs provide the flexible, cost effective base needed for future generations of secure hardware products,” said Alex Bradbury, lowRISC CTO. “The lowRISC not-for-profit structure combined with full stack engineering capabilities in-house, enables us to manage high quality projects like OpenTitan, and we look forward to developing this partnership and new ones in the future.”

“At lowRISC, our mission is to establish a vibrant ecosystem around open silicon designs and to help lower the barrier to producing custom chips,” said Gavin Ferris, lowRISC CIC board member. “Creating an ecosystem of like-minded organizations focused on the goal of improving transparency around chips helps increase trust in the overall security of the infrastructure on which software runs. With OpenTitan, enterprise organizations and consumers alike will benefit from services built on a more secure infrastructure that is anchored in transparently implemented OpenTitan chips.”

“Customers are asked to put faith in proprietary hardware RoT chips for their mission-critical systems without the ability to fully understand, inspect and therefore trust them,” said Dominic Rizzo, OpenTitan Lead at Google and lowRISC’s OpenTitan Project Director. “By creating OpenTitan with the broader hardware and academic community, we can leverage the experience and security principles used to create Google’s own Titan chips to make hardware RoT designs more transparent, inspectable, and accessible to the rest of the industry. Security should never be built on opacity.”

Collaboration is fundamental to open silicon and at the core of everything that lowRISC does, bringing to projects a deep understanding of open source licensing, contributor models and community building, and providing a uniquely positioned engineering capability.

About lowRISC

lowRISC C.I.C. is a not-for-profit company that aims to demonstrate, promote and support the use of open-source hardware - bringing the benefits of open-source to the hardware world. We are producing high-quality, security-focused, open, and flexible IP. Our expertise includes the LLVM Compiler, novel hardware security extensions and RISC-V tools, hardware and processor design.

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Contact information

Andrew Back
lowRISC
press@lowrisc.org